The present invention relates to a solid-state image pickup device and an output method thereof used in various image sensors and camera systems for taking a picture of a subject and outputting a video signal.
Conventionally, in a case of 10-bit digital output, for example, this type of solid-state image pickup device has ten output terminals corresponding to the bit width.
Specifically, in the solid-state image pickup device, each light signal read from an image pickup pixel unit is sampled into 10 bits, the ten output terminals become high or low in synchronism with a clock, and thereby a signal of one pixel is outputted with one clock.
It has recently been important to increase reading speed. In a VGA format with about three hundred thousand pixels, for example, an output rate is 12 MHz, and 30 images per second, which is seen by the human eye to be a smooth moving image, can be outputted.
However, to output 30 images per second from a solid-state image pickup device with three million pixels or 30 million pixels requires high-speed operation at 120 MHz or 1.2 GHz.
Further, even if such an extremely large number of pixels is not required, to construct a camera system having a high time resolution for capturing crash tests on cars and the moment of impact of a ball hit by a baseball batter, for example, requires an output of 100 to 1000 images per second and, thus, requires a high-speed output.
Thus, conventionally, the number of output terminals is increased to provide hundreds of output terminals, whereby video signals are outputted in parallel.
Such a configuration in which output terminals are simply provided in parallel with each other, however, has a large number of output terminals, thus leading to an increase in area and cost of the solid-state image pickup device.
An IC in a next stage also is increased in size with an increased number of input terminals. As a result, various problems occur, such as difficulty in implementation, difficulty in reducing the size of the camera, difficulty in synchronizing many output signals, difficulty in output at high clock speeds because of the problem of synchronization, and the like.
On the other hand, to reduce the number of output the clock speed is increased, however, the time of charging and discharging a capacitance of a path to the IC in the next stage cannot be ignored, and waveforms are blunted. In the worst case, signals do not reach a high/low level of the IC in the next stage, and consequently the IC in the next stage cannot recognize the signals.
Such a problem occurs not only when the clock speed is to be increased but also when the capacitance in a signal path is increased for some reason, for example, because the path to the IC in the next stage is desired to be lengthened for use in an endoscope.
Further, output at a high clock speed causes undesired radiation to be emitted from the signal path between the solid-state image pickup device and the IC in the next stage and, thus, affects operation of other electronic apparatuses and the solid-state image pickup device itself. Audio/video apparatuses, for example, cause degradation in sound quality/picture quality.